Platform
The Neurmorph platform stack
Three integrated layers — Compiler, Runtime, and HAL — form a complete toolchain from trained PyTorch model to silicon-resident spike-coded executable. Each layer is independently versioned and testable.
Architecture
Software stack layers
NMC Compiler
Graph optimizer for spiking workloads
NMC takes a torchscript or ONNX graph and runs six optimization passes: dead-spike elimination, temporal op fusion, rate normalization, threshold calibration, HAL mapping, and binary serialization. Output is a .snn binary that loads directly into the Edge Runtime.
Compiler deep dive →$ nmc compile \
--model resnet18.pt \
--target nt3000 \
--output model.snn
compiled model.snn 0.82 mW / 1.4 ms
Edge Runtime
Event-driven execution engine
The Edge Runtime manages spike queues, event timestep windowing, power-gated idle states, and memory pool allocation on-chip. No RTOS dependency. Written in C99 with platform-specific HAL shims — portable to any bare-metal environment where .snn executables can run.
Runtime architecture →Hardware
Supported neuromorphic targets
| Chip | Manufacturer | Neuron Count | Peak Power | HAL Status |
|---|---|---|---|---|
| NT3000 | Synthetic reference | 256K | 1.2 mW | Supported |
| BrainPulse-2 | Synthetic reference | 128K | 2.4 mW | Supported |
| SynCore-V | Synthetic reference | 512K | 0.8 mW | Supported |
| NT4000 (next-gen) | — | 1M | TBD | Beta Q3 2026 |
Ready to compile your model?
Start with the Quickstart guide to install NMC CLI, compile your first PyTorch model, and deploy to an evaluation target.